High-speed signal-ended buses are widely used for both on-package and off-package lines of communication to address high bandwidth demands of integrated circuit (IC) packages. However, crosstalk, especially that of the vertical interconnects, may limit the data rate that these high-speed signal-ended buses are able to achieve and, therefore, may pose a challenge in meeting signaling performance targets. Additional pins may be utilized for ground connections so that more vertical interconnects are available to be assigned as grounds in an effort to isolate signals from each other and hence lower crosstalk between signals. However, these additional pins may increase the package form factor and may increase the cost of manufacturing.
The background description provided herein is for generally presenting the context of the disclosure. Unless otherwise indicated herein, the materials described in this section are not prior art to the claims in this application and are not admitted to be prior art or suggestions of the prior art by inclusion in this section.